WD_IRQ_ONLY=Val_0x0
Watchdog Register
WD_IRQ_ONLY | This bit controls how the DMAC responds when it detects a lock-up condition. For more information, see Section Watchdog Abort. 0 (Val_0x0): The DMAC aborts all of the contributing DMA channels and sets IRQ_ABORT high. 1 (Val_0x1): The DMAC sets IRQ_ABORT high. |